The present invention relates to operational amplifiers.
In many areas of the electronics industry, electronic circuit designers are turning toward lower operating voltages. This enables electronic circuit designers to design systems with smaller power supplies. Smaller power supplies increase the life expectancy of the system power supply and reduce product weight and size. This is especially true where dc power supplies are used to sustain circuit operation.
However, while reduced operating voltages are beneficial in reducing product size and extending useful battery life, the lower voltages typically adversely affect circuit operation. For example, as circuit supply voltages are reduced, the range of circuit signal voltages which are available for circuit operation is also reduced.
One method of increasing the voltage range over which an amplifier operates, involves using a two-stage differential amplifier. A two-stage differential amplifier has both a differential input stage and a differential output stage. In a typical two-stage differential amplifier arrangement, the input stage of the differential amplifier may use complementary pairs of input transistors and may operate rail-to-rail.
Prior art FIG. 1 depicts an exemplary embodiment of a two-stage differential amplifier 100 which is disclosed in U.S. Pat. No. 6,150,883 issued Nov. 21, 2000 to Ivanov. The Ivanov patent generally discloses a differential amplifier 100 with a rail-to-rail common mode input stage. The amplifier 100 includes a first supply rail (V+), a second supply rail (Vxe2x88x92), first (VIN+) and second (VINxe2x88x92) input terminals for receiving a differential input signal, a current bias circuit 49 for summing the voltage provided by the input stage, and an output stage. The amplifier may include a first pair of the complementary input transistors connected to a high-voltage input V1+ and a second pair of complementary transistors connected to a low-voltage input V1xe2x88x92. The high-voltage input V1+ is the sum of the common mode voltage VCM of the input signal and the difference between high rail and low rail voltages xcex94V (e.g., V1xe2x88x92=VCM+xcex94V). Similarly, the voltage V1xe2x88x92 is the difference of the common mode voltage VCM of the input signal and the difference between high rail and low rail voltages xcex94V (e.g., V1xe2x88x92=VCMxe2x88x92xcex94V). Thus, when taken together, the differential part of the input signal is two times the difference of the rail voltages or 2xcex94V allowing amplifier 100 to operate at low rail-to-rail supply voltages.
While the amplifier 100 may provide a circuit which is linearly operable at a low range of rail-to-rail supply voltages, the overall bandwidth of the amplifier may be limited in large part by the size and transconductance of the output transistors. Transconductance g, is a measure of the gain (e.g., bandwidth) of a differential amplifier. Thus, where an output stage is used, such as with a two-stage differential amplifier, the transconductance of the output stage becomes a limiting factor, affecting both the overall gain of the amplifier, and the speed at which the amplifier may operate.
For example, the overall open loop gain of the two-stage differential amplifier 100 may be approximated by the following equation,
A=g1ZeqvgoutZLxe2x80x83xe2x80x83(1),
where A is the overall gain of the amplifier, g1 is the transconductance of the input stage, Zeqv is the equivalent impedance in the node comprising the gates of the output transistors, gout is the transconductance of the output transistors and ZL is the overall load impedance. Consequently, where the transconductance g1 of the input stage and the load impedance ZL are held constant, the overall gain of the amplifier A may be dominated by both the transconductance of the output transistors gout and the equivalent impedance in the node comprising the gates of the output transistors Zeqv. In this instance Zeqv may be calculated based on the size and/or dimensions of the output transistors used.
The size of each of the transistors corresponds the maximum load current of the system and the acceptable saturation voltage for a given load at a maximum given gate drive. The gate drive of the output stage is limited by the supply voltage and the amplifier control circuitry. Further, the drain/source characteristic of the output stage should be designed to withstand the maximum supply voltage of the overall circuit.
Where a high-voltage CMOS transistor is used, such as with amplifier 100, the high-voltage transistor typically has a longer channel and often thicker gate oxide than with a comparable low-voltage transistor. In some cases the overall size of the channel of the high-voltage transistor, as given by the longer channel and thicker gate oxide, is often 5-20 times that of a similar low-voltage transistor. Consequently, when comparing the operational speed of the high-voltage rated transistor to that of the low-voltage rated transistor, a signal may take up to 5-20 times longer to propagate across the high-voltage transistor channel.
A circuit according to various aspects of the present invention includes an output stage utilizing both low-voltage rated transistors and high-voltage rated transistors. Thus, the circuit provides a differential amplifier with a higher gain to speed ratio over the prior art.
More particularly, the low-voltage transistors may be controlled (e.g. biased) from the input stage. The input stage may be of any appropriate configuration, such as, for example, rail-to-rail or single-supply configuration. The differential amplifier may further employ an output stage including a pair of low-voltage rated transistors and a pair of high-voltage rated transistors. Control circuitry may further be used to regulate the current provided to the high-voltage rated transistors and the low-voltage transistors of the output stage, such that the gain-speed-power figure of merit for the circuit is increased.
In one exemplary embodiment of the present invention, a cascode circuit may be used to control the current provided by the differential amplifier input stage. The differential amplifier output stage may include a current steering circuit for biasing the gates of the low-voltage transistors, and for providing, that both the low-voltage transistors and the high-voltage transistors remain above their respective transistor saturation points during operation. The cascode circuit may be connected to the current steering circuit which may be further connected to the low-voltage transistors. The low-voltage transistors may be further connected to the high-voltage transistors and to the output conductor of the amplifier circuit.
The transconductance of the output stage of the differential amplifier may be increased over amplifiers using only high-voltage transistors, thereby improving the overall speed of the differential amplifier system. The overall speed of the differential amplifier systems may be improved in accordance with the length of the channels of the low-voltage transistors used. For example, since the size of the low-voltage transistors controlled by the input stage is 5-20 times smaller as compared to the straight forward use of high-voltage transistors, then the transconductance and thus the overall gain of the differential amplifier may be increased by 5-10 times over differential amplifiers using a traditional output stage configuration.